1.Comparative Analysis of LEON 3 and NIOS II Processor Development Environment: Case Study Rijindael’s Encryption Algorithm

作　　者：Meghana Hasamnis ;Priti Chimankar ;S. S. Limaye

出　　处：International Journal of Electronics and Computer Science Engineering. 2012 ;1(3):1308-1314.

出版社：Buldanshahr : IJECSE

文章 ID：88366566

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2.Optimized Design of 2D Mesh NOC Router using Custom SRAM & Common Buffer Utilization

作　　者：Bhavana Pote ;V. N. Nitnaware ;S. S. Limaye

出　　处：International Journal of VLSI Design & Communication Systems. 2011 ;2(4).

出版社：Academy & Industry Research Collaboration Center (AIRCC)

文章 ID：86826321

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3.Area-Efficient Design of Scheduler for Routing Node of Network-On-Chip

作　　者：Rehan Maroofi ;V. N. Nitnaware ;S. S. Limaye

出　　处：International Journal of VLSI Design & Communication Systems. 2011 ;2(3).

出版社：Academy & Industry Research Collaboration Center (AIRCC)

文章 ID：86826330

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4.64 Bit Domino Logic Adder with 180nm CMOS Technology

作　　者：M.B. Damle ;S. S. Limaye

出　　处：International Journal of Advanced Research in Computer Engineering & Technology (IJARCET). 2012 ;1(4):1-5.

出版社：Shri Pannalal Research Institute of Technolgy

文章 ID：181212157

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5.Low-power Full Adder array-based Multiplier with Domino Logic

作　　者：M.B. Damle ;S. S. Limaye

出　　处：International Journal of Advanced Research in Computer Engineering & Technology (IJARCET). 2012 ;1(4):6-10.

出版社：Shri Pannalal Research Institute of Technolgy

文章 ID：181212158

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	计算技术、计算机技术	4篇
	计算机的应用	1篇

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	S. S. Limaye	5篇
	M.B. Damle	2篇
	V. N. Nitnaware	2篇
	Bhavana Pote	1篇
	Meghana Hasamnis	1篇

	International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)	2篇
	International Journal of VLSI Design & Communication Systems	2篇
	International Journal of Electronics and Computer Science Engineering	1篇

	2012	3篇
	2011	2篇

	Priti Chimankar	1篇
	Rehan Maroofi	1篇