1.FPGA Implementation of Moving Object and Face Detection Using Adaptive Threshold

作　　者：Sateesh Kumar H.C ;Sayantam Sarkar ;Satish S Bhairannawar 等

出　　处：International Journal of VLSI Design & Communication Systems. 2015 ;6(5):15.

出版社：Academy & Industry Research Collaboration Center (AIRCC)

文章 ID：216765031

文章详细全文下载
2.FPGA Based Efficient Multiplier for Image Processing Applications Using Recursive Error Free Mitchell Log Multiplier and KOM Architecture

作　　者：Satish S Bhairannawar ;Rathan R ;Raja K B 等

出　　处：International Journal of VLSI Design & Communication Systems. 2014 ;5(3):93.doi:10.5121/vlsic.2014.5309

出版社：Academy & Industry Research Collaboration Center (AIRCC)

文章 ID：216765064

文章详细全文下载
3.An efficient FPGA based NoC architecture for data communication

作　　者：Vijayalaxmi Jamagoud ;Satish S. Bhairannawar

出　　处：International Journal of Advanced Computer Research. 2018 ;8(39):335-341.

出版社：Association of Computer Communication Education for National Triumph (ACCENT)

文章 ID：226649316

文章详细
4.A reconfigurable architecture for object detection using adaptive threshold

作　　者：Sangeeta. M. Gangannavar ;S. S. Navalgund ;Satish S. Bhairannawar

出　　处：International Journal of Advanced Computer Research. 2018 ;8(38):257-267.

出版社：Association of Computer Communication Education for National Triumph (ACCENT)

文章 ID：226649322

文章详细

	有全文链接	2篇
	有本地全文	2篇

	Satish S Bhairannawar	2篇
	Satish S. Bhairannawar	2篇
	L M Patnaik	1篇
	Raja K B	1篇
	Raja K.B	1篇

	Rathan R	1篇
	S. S. Navalgund	1篇
	Sangeeta. M. Gangannavar	1篇
	Sateesh Kumar H.C	1篇
	Sayantam Sarkar	1篇
	Venugopal K R	1篇
	Venugopal K.R	1篇
	Vijayalaxmi Jamagoud	1篇

全文

出版年度

作者

来源期刊

学科主题

语种

国别/地区

检索条件:"( ( 高级检索(( ((AU:(("Satish S. Bhairannawar")))) )) ) )"

	International Journal of Advanced Computer Research	2篇
	International Journal of VLSI Design & Communication Systems	2篇

	2018	2篇
	2015	1篇
	2014	1篇