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  • 标题:Estimation of Hardware Complexity of Residue Number System for Signal Processing Application
  • 本地全文:下载
  • 作者:Chaitali Biswas Dutta ; Partha Garai ; Amitabha Sinha
  • 期刊名称:International Journal of Computer Technology and Applications
  • 电子版ISSN:2229-6093
  • 出版年度:2011
  • 卷号:2
  • 期号:5
  • 页码:1540-1547
  • 出版社:Technopark Publications
  • 摘要:Residue Number System (RNS) are becoming popular for designing high performance DSP processors because of their ability to offer carry free arithmetic operation. The carry free operations lead to concurrent execution of arithmetic operations on the residues.However in RNS, moduli selection is one of the most important parameter that determines bit efficiency, area, power consumption, speed etc. The novelty of the architecture is shown by comparison the different schemes reported in the literature. Also a Ranking method is proposed using which moduli sets can be ranked in terms of bit efficiency & hardware complexity
  • 关键词:Residue Number System; Moduli Selection;Dynamic Range; Hardware Complexity; Area Estimator
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