文章基本信息

标题：Novel Ultra Low Power Multi-threshold CMOS Technology
本地全文：下载
作者：P.Sreenivasulu ; G.Vinatha ; Dr. K.Srinivasa Rao 等
期刊名称：International Journal of Advanced Research In Computer Science and Software Engineering
印刷版ISSN：2277-6451
电子版ISSN：2277-128X
出版年度：2013
卷号：3
期号：8
出版社：S.S. Mishra
摘要：A 1-V high-speed and low-power digital circuit technology with 0.5-pm multithreshold CMOS (MT-CMOS) is proposed. This technology applies both low-threshold voltage and high-threshold voltage MOSFETs in one LSI. Low-threshold voltage MOSFETs enhances speed performance at a supply voltage of 1 V or less. High-threshold voltage MOSFETs suppresses the stand-by leakage current during the sleep period. The technology has achieved logic gate characteristics of 1.7-ns propagation delay time and 0.3-pWIMHzIgate power dissipation. To demonstrate its effectiveness, a standard cell based PLL-LSI was designed as a carrying vehicle. An 18-MHz operation at 1 V was obtained using a 0.5-pm MT-CMOS process
关键词：Ground bounce; leakage power; low power; multi threshold voltage