文章基本信息

标题：Memory Disambiguation Hardware: a Review
本地全文：下载
作者：F. Castro ; D. Chaver ; L. Piñuel 等
期刊名称：Journal of Computer Science and Technology
印刷版ISSN：1666-6046
电子版ISSN：1666-6038
出版年度：2008
卷号：8
期号：3
出版社：Iberoamerican Science & Technology Education Consortium
摘要：One of the main challenges of modern processor designs is the implementation of scalable and efficient mechanisms to detect memory access order violations as a result of out-of-order execution. Conventional structures performing this task are complex, inefficient and power-hungry. This fact has generated a large body of work on optimizing address-based memory disambiguation logic, namely the load-store queue. In this paper we review the most significant proposals in this research field, focusing on our own contributions
关键词：LSQ; Memory Disambiguation; ;Energy-Efficiency; Filtering; Hardware ;Simplification