文章基本信息

标题：Implementation of Floating Point Multiplier on Reconfigurable Hardware and Study its Effect on 4 input LUTâ€˜s
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作者：Pardeep Sharma ; Ajay Pal Singh
期刊名称：International Journal of Advanced Research In Computer Science and Software Engineering
印刷版ISSN：2277-6451
电子版ISSN：2277-128X
出版年度：2012
卷号：2
期号：7
出版社：S.S. Mishra
摘要：Floating point multiplication is a most widely used operation in DSP/Math processors, robots, air traffic controller, digital computers. Because of its vast areas of application, the main emphasis is on the implementing it effectively such that it uses less combinational delay with high Speed. Floating point operations are hard to implement on FPGAs i.e. on reconfigurable hardware's because of their complexity of their algorith ms. On the other hand, many scientific problems require floating point arithmetic with high level of accuracy in their calculations. Therefore VHDL programming for IEEE single precision floating point multiplier module have been explored. The parameter 4 input LUT's (Look up Table's) has been analyzed while implementing the floating point multiplier on Spartan 2, Spartan 2E, Spartan 3, Spartan 3E, Virtex, Virtex 2, Virtex 2P, Virtex 4 and Virtex E FPGA's.
关键词：floating point multiplier; FPGAs; 4 input LUT's; Xilinx; Spartan and Virtex.