文章基本信息

标题：MATRIX MULTIPLICATION USING HIGH COMPUTING FIELD PROGRAMMABLE GATE ARRAYS
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作者：Mr. Rounak R. Gupta ; Prof. Atul S. Joshi
期刊名称：International Journal of Enterprise Computing and Business Systems
电子版ISSN：2230-8849
出版年度：2012
卷号：2
期号：2
出版社：International Journal of Enterprise Computing and Business Systems
摘要：Matrix manipulation is very important in many types of applications. The suitability of reconfigurable hardware devices, in the form of field programmable gate arrays (FPGAs), is investigated as a low-cost solution for implementing two matrix manipulation operations. This paper present the design and implementation of matrix operations like addition, subtraction and multiplication using VHDL design approach, where the performances of programming language have been presented Solutions for processing different matrix operations. Advanced RISC Machine (ARM) is the Implementation result of the RISC microprocessor architecture. RISC introduces simpler hardware processor architecture because fixed length Instruction format with the opcode in the same bit position requires less decoding, allowing any register to be used in any context simplifies the compiler design and Complex addressing is performed through sequences of arithmetic and/or load store operations
关键词：Matrix manipulation is very important in many types of applications. The suitability of;reconfigurable hardware devices; in the form of field programmable gate arrays (FPGAs); is;investigated as a low-cost solution for implementing two matrix manipulation operations. This;paper present the design and implementation of matrix operations like addition; subtraction;and multiplication using VHDL design approach; where the performances of programming;language have been presented Solutions for processing different matrix operations.;Advanced RISC Machine (ARM) is the Implementation result of the RISC;microprocessor architecture. RISC introduces simpler hardware processor architecture;because fixed length Instruction format with the opcode in the same bit position requires less;decoding; allowing any register to be used in any context simplifies the compiler design and;Complex addressing is performed through sequences of arithmetic and/or load store;operations