文章基本信息

标题：An Improved Structure Of Reversible Adder And Subtractor
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作者：Aakash Gupta ; Pradeep Singla ; Jitendra Gupta 等
期刊名称：International Journal of Electronics and Computer Science Engineering
电子版ISSN：2277-1956
出版年度：2013
卷号：2
期号：2
页码：712-718
出版社：Buldanshahr : IJECSE
摘要：In today’s world everyday a new technology which is faster, smaller and more complex than its predecessor is being developed. The increased number of transistors packed onto a chip of a conventional system results in increased power consumption that is why Reversible logic has drawn attention of Researchers due to its less heat dissipating characteristics. Reversible logic can be imposed over applications such as quantum computing, optical computing, quantum dot cellular automata, low power VLSI circuits, DNA computing. This paper presents the reversible combinational circuit of adder, subtractor and parity preserving subtractor. The suggested circuit in this paper are designed using Feynman, Double Feynman and MUX gates which are better than the existing one in literature in terms of Quantum cost, Garbage output and Total logical calculations.
关键词：Reversible Logic; Constant Input; Garbage output; Total Logical Calculation; Adder and Subtractor.