文章基本信息

标题：VLSI Design and Implementation of Ternary Logic Gates and Ternary SRAM Cell
本地全文：下载
作者：Ms. Nilmani P. Wanjari ; Ms. Shweta P. Hajare
期刊名称：International Journal of Electronics and Computer Science Engineering
电子版ISSN：2277-1956
出版年度：2013
卷号：2
期号：2
页码：610-618
出版社：Buldanshahr : IJECSE
摘要：This paper presents Very Large Scale Integration (VLSI) design and simulation of a ternary logic gates and CMOS ternary SRAM cell. The Simple Ternary Inverter, Positive Ternary Inverter and Negative Ternary Inverter are designed in 180nm technology. The Ternary NAND Gate and Ternary NOR Gate are also designed and simulated. The ternary SRAM consists of crosscoupled ternary inverters. SPICE simulations confirmed that the functional behavior of the READ and WRITE operations is correct.
关键词：Multiple-valued logic (MVL); CMOS Ternary Logic; Ternary SRAM; Simple Ternary Inverter (STI); Positive Ternary;Inverter (PTI); Negative Ternary Inverter (NTI)