文章基本信息

标题：Optimization of Power Consumption in VLSI Circuit
本地全文：下载
作者：Zamin Ali Khan ; Aqil Burney ; Jawed Naseem 等
期刊名称：International Journal of Computer Science Issues
印刷版ISSN：1694-0784
电子版ISSN：1694-0814
出版年度：2011
卷号：8
期号：2
出版社：IJCSI Press
摘要：Space, power consumption and speed are major design issues in VLSI circuit. The design component has conflicting affect on overall performance of circuits. An optimization of power dissipation can be achieved by compromising various components. Power consumption in VLSI circuit (like in multipliers) is also data dependent. In this paper attempt has been made to test different design methods and propose a modular approach for optimizing power consumption. It is found that algorithm based design reduce gate switching activity considerably and as result power consumption in multiplier is reduced.
关键词：Genetic Algorithm; Booth Multiplication; Power Optimization