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  • 标题:Dual Metal Gate and Conventional MOSFET at Sub nm for Analog Application
  • 本地全文:下载
  • 作者:Sonal Aggarwal ; Rajbir Singh
  • 期刊名称:International Journal of VLSI Design & Communication Systems
  • 印刷版ISSN:0976-1527
  • 电子版ISSN:0976-1357
  • 出版年度:2012
  • 卷号:3
  • 期号:1
  • 出版社:Academy & Industry Research Collaboration Center (AIRCC)
  • 摘要:The use of nanometer CMOS technologies (below 90nm) however brings along significant challenges for circuit design (both analog and digital). By reducing the dimensions of transistors many physical phenomenon like gate leakage, drain induced barrier lowering and many more effects comes into picture. Reducing the feature size in the technology of device with the addition of ever more interconnect layers, the density of the digital as well as analog circuit will increase while intrinsic gate switching delay is reduced . We have simulated conventional and DMG MOSFET at 30nm scale using Silvaco TAD tool and obtained result. A two dimensional device simulation was carried out and observed that DMG MOSFET has a low leakage current as compared to conventional MOSFET and find suitable application in analog circuits.
  • 关键词:Gate leakage; DMG MOSFET; Silvaco TCAD tool; work function; trans-conductance; gain; Moore’s Law.
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