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  • 标题:Modeling of Built-In Potential Variations of Cylindrical Surrounding Gate (CSG) MOSFETs
  • 本地全文:下载
  • 作者:Santosh Kumar Gupta ; S. Baishya
  • 期刊名称:International Journal of VLSI Design & Communication Systems
  • 印刷版ISSN:0976-1527
  • 电子版ISSN:0976-1357
  • 出版年度:2012
  • 卷号:3
  • 期号:5
  • 出版社:Academy & Industry Research Collaboration Center (AIRCC)
  • 摘要:Due to aggressive scaling of MOSFETs the parasitic fringing field plays a major role in deciding its characteristics. These fringing fields are now not negligible and should be taken into account for deriving the MOSFET models. Due to this fringing field effect there are some charges induced in the source/drain extension regions which will change the potential barrier at the source-channel from its theoretical nominal values. In this paper an attempt has been made to model variation of built-in potential variation for a cylindrical surrounding gate MOSFET. The model has been verified to be working in good agreement with the variations of gate length and channel radius.
  • 关键词:Barrier lowering; cylindrical surround gate (CSG) MOSFET; fringing field; short channel effects (SCEs)
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