文章基本信息

标题：Single bit full adder design using 8 transistors with novel 3 transistors XNOR gate
本地全文：下载
作者：Manoj Kumar ; Sandeep K. Arya ; Sujata Pandey 等
期刊名称：International Journal of VLSI Design & Communication Systems
印刷版ISSN：0976-1527
电子版ISSN：0976-1357
出版年度：2011
卷号：2
期号：4
出版社：Academy & Industry Research Collaboration Center (AIRCC)
摘要：In present work a new XNOR gate using three transistors has been presented, which shows power dissipation of 550.7272µW in 0.35µm technology with supply voltage of 3.3V. Minimum level for high output of 2.05V and maximum level for low output of 0.084V have been obtained. A single bit full adder using eight transistors has been designed using proposed XNOR cell, which shows power dissipation of 581.542µW. Minimum level for high output of 1.97V and maximum level for low output of 0.24V is obtained for sum output signal. For carry signal maximum level for low output of 0.32V and minimum level for high output of 3.2V have been achieved. Simulations have been performed by using SPICE based on TSMC 0.35µm CMOS technology. Power consumption of proposed XNOR gate and full adder has been compared with earlier reported circuits and proposed circuit’s shows better performance in terms of power consumption and transistor count.
关键词：CMOS; exclusive-OR (XOR); exclusive-NOR (XNOR); full adder; low power; pass transistor logic.