文章基本信息

标题：Dual Field Dual Core Secure Cryptoprocessor on FPGA Platform
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作者：C. Veeraraghavan ; K. Rajendran
期刊名称：International Journal of VLSI Design & Communication Systems
印刷版ISSN：0976-1527
电子版ISSN：0976-1357
出版年度：2013
卷号：4
期号：1
出版社：Academy & Industry Research Collaboration Center (AIRCC)
摘要：This paper is devoted to the design of dual core crypto processor for executing both Prime field and binary field instructions. The proposed design is specifically optimized for Field programmable gate array (FPGA) platform. Combination of two different field (prime field GF(p) and Binary field GF(2m)) instructions execution is analysed.The design is implemented in Spartan 3E and virtex5. Both the performance results are compared. The implementation result shows the execution of parallelism using dual field instructions
关键词：Crypto processor; FPGA; Prime field; Binary field.