文章基本信息

标题：High Speed VLSI Architecture for Multilevel Lifting 2-D DWT Using MIMO
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作者：Srikanth.S ; M.Jagadeeswari
期刊名称：International Journal of Soft Computing & Engineering
电子版ISSN：2231-2307
出版年度：2012
卷号：2
期号：2
页码：60-64
出版社：International Journal of Soft Computing & Engineering
摘要：The Discrete Wavelet Transform (DWT) Lifting architecture is a powerful signal analysis technique for non-stationary data. High speed implementation of this architecture is a challenging task. This paper proposes an efficient multi-input/multi-output VLSI architecture (MIMO) for two-dimensional lifting-based discrete wavelet transform (DWT). Computing time for this high speed architecture is as low as N2/M for an N X N image with controlled increase of hardware cost. M is the throughput rate. The experimental results show that proposed architecture provides high throughput and power consumption compared to the conventional architecture.
关键词：Discrete Wavelet Transform Lifting Scheme;MIMO; Memory Buffer; SISO.