期刊名称:International Journal of Reconfigurable Computing
印刷版ISSN:1687-7195
电子版ISSN:1687-7209
出版年度:2011
卷号:2011
DOI:10.1155/2011/601986
出版社:Hindawi Publishing Corporation
摘要:The design of energy-efficient systems has become
a major challenge for engineers over the last decade. One way
to save energy is to spread out computations in space rather
than in time (as traditional processors do). Unfortunately, this
requires to design specialized hardware for each application.
Also, the nonrecurring expenses for the manufacturing of
chips continuously grow. Implementing the computations on
FPGAs and CGRAs solves this dilemma, as the non recurring
expenses are shared between many different applications. We
believe that online synthesis that takes place during the execution
of an application is one way to broaden the applicability of
reconfigurable architectures as no expert knowledge of synthesis
and technologies is required. In this paper, we give a detailed
analysis of the amount and specialization of resources in a CGRA
that are required to grant a significant speedup of Java bytecode.
In fact, we show that even a relatively small number of specialized
reconfigurable resources is sufficient to speed up applications
considerably. Particularly, we look at the number of dedicated
multipliers and dividers. Also, we discuss the required number of
concurrent memory access operations inside the CGRA. Again,
it shows that two concurrent memory access operations are
sufficient for almost all applications.