The Auction Based methodology for routing of 3D FPGA (Field Programmable Gate Arrays) has been implemented using two approaches. One is the Simultaneous approach, where the Nets bid for the Pins they need, and all the bids are processed simultaneously. In the sequential approach, the bidding process is finalized sequentially. It has been observed that in large circuit designs, the simultaneous approach gives better results over sequential approach.
Field programmable gate arrays, Routing, Nets, Wire, Algorithms