期刊名称:Electronic Colloquium on Computational Complexity
印刷版ISSN:1433-8092
出版年度:2020
卷号:2020
页码:1-36
出版社:Universität Trier, Lehrstuhl für Theoretische Computer-Forschung
摘要:We show an Ωe (n 2.5) lower bound for general depth four arithmetic circuits computing an explicit n-variate degree-Θ(n) multilinear polynomial over any field of characteristic zero. To our knowledge, and as stated in the survey [SY10], no super-quadratic lower bound was known for depth four circuits over fields of characteristic 6= 2 before this work. The previous best lower bound is Ωe (n 1.5) [Sha17], which is a slight quantitative improvement over the roughly Ω(n 1.33) bound obtained by invoking the super-linear lower bound for constant depth circuits in [Raz10,SS97]. Our lower bound proof follows the approach of the almost cubic lower bound for depth three circuits in [KST16] by replacing the shifted partials measure with a suitable variant of the projected shifted partials measure, but it differs from [KST16]’s proof at a crucial step – namely, the way “heavy” product gates are handled. Loosely speaking, a heavy product gate has a relatively high fan-in. Product gates of a depth three circuit compute products of affine forms, and so, it is easy to prune Θ(n) many heavy product gates by projecting the circuit to a low-dimensional affine subspace [KST16, SW01]. However, in a depth four circuit, the second (from the top) layer of product gates compute products of polynomials having arbitrary degree, and hence it was not clear how to prune such heavy product gates from the circuit. We show that heavy product gates can also be eliminated from a depth four circuit by projecting the circuit to a low-dimensional affine subspace, unless the heavy gates together account for Ωe (n 2.5) size. This part of our argument is inspired by a well-known greedy approximation algorithm for the weighted set-cover problem.