期刊名称:International Journal of Modern Education and Computer Science
印刷版ISSN:2075-0161
电子版ISSN:2075-017X
出版年度:2019
卷号:11
期号:10
页码:47-53
DOI:10.5815/ijmecs.2019.10.06
出版社:MECS Publisher
摘要:In the present era of miniaturization, higher power dissipation in form of heat has become a very critical issue for the digital Circuits. This excessive heat may result in the lower chip reliability and even destroy it. Due to this reason a substitute is required for the traditional CMOS technology, Reversible logic is a paradigm in this direction. This paper encompasses of the newly proposed SA reversible logic and basic combinational implementations using a single SA building block only resulting in lower circuit level complexity as well as hardware requirement. The output responses and energy dissipation of proposed SA reversible logic are verified and calculated with the help of QCADesigner and QCADesigner-E simulation tools respectively.