文章基本信息

标题：Complex Binary Adder Designs and their Hardware Implementations
本地全文：下载
作者：Tariq Jamil ; Medhat Awadalla ; Iftaquaruddin Mohammed 等
期刊名称：International Journal of Advanced Computer Science and Applications(IJACSA)
印刷版ISSN：2158-107X
电子版ISSN：2156-5570
出版年度：2019
卷号：10
期号：7
页码：252-260
DOI：10.14569/IJACSA.2019.0100734
出版社：Science and Information Society (SAI)
摘要：Complex Binary Number System (CBNS) is (-1+j)-based on binary number system which facilitates both real and imaginary components of a complex number to be represented as single binary number. In this paper, we have presented three designs of nibble-size complex binary adders (ripple-carry, decoder-based, minimum-delay) and implemented them on various Xilinx FPGAs. The designs of base2 4-bit binary adder have also been implemented so that statistics of different adders can be compared.
关键词：Complex number; complex binary; adder; ripple carry; decoder; minimum delay