摘要:Tremendous enhancement of light-matter interaction in plasmonic-dielectric hybrid devices allows for non-linearities at the level of single emitters and few photons, such as single photon transistors. However, constructing integrated components for such devices is technologically extremely challenging. We tackle this task by lithographically fabricating an on-chip plasmonic waveguide-structure connected to far-field in- and out-coupling ports via low-loss dielectric waveguides. We precisely describe our lithographic approach and characterize the fabricated integrated chip. We find excellent agreement with rigorous numerical simulations. Based on these findings we perform a numerical optimization and calculate concrete numbers for a plasmonic single-photon transistor.