文章基本信息

标题：Fault Injection and Test Approach for Behavioural Verilog Designs using the Proposed RASP-FIT Tool
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作者：Abdul Rafay Khatri ; Ali Hayek ; Josef Börcsök 等
期刊名称：International Journal of Advanced Computer Science and Applications(IJACSA)
印刷版ISSN：2158-107X
电子版ISSN：2156-5570
出版年度：2019
卷号：10
期号：4
页码：57-63
DOI：10.14569/IJACSA.2019.0100407
出版社：Science and Information Society (SAI)
摘要：Soft-core processors and complex Field Pro-grammable Gate Array (FPGA) designs are described as an algorithmic manner, i.e. behavioural abstraction level in Hard-ware Description Languages (HDL). Lower abstraction levels add complexity and delays in the design cycle as well as in the fault injection approach. Therefore, fault simulation/emulation techniques are demanded to develop an approach for testing of design and to evaluate dependability analysis of FPGA designs at this abstraction level. Broadly, the fault injection techniques for FPGA-based designs at the HDL code level are categorised into emulation and simulation-based techniques. This work is an extension of our previous methodologies developed for FPGA designs written at data-flow and gate abstraction levels under the proposed RASP-FIT tool. These methodologies include fault injection by code parsing of the SUT, test approach for finding the test vectors using dynamic and static compaction techniques, fault coverage, and compaction ratio directly at the code level of the design. In this paper, we described the proposed approaches briefly, and the enhancement of a Verilog code modifier for the behavioural designs is presented in detail.
关键词：Behavioural designs; code parsing; fault injection; test approach; Verilog HDL