文章基本信息

标题：PERFORMANCE EVALUATION OF VARIOUS ON-CHIP TOPOLOGIES
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作者：BANSIDHAR JOSHI ; MANISH K THAKUR
期刊名称：Journal of Theoretical and Applied Information Technology
印刷版ISSN：1992-8645
电子版ISSN：1817-3195
出版年度：2018
卷号：96
期号：15
出版社：Journal of Theoretical and Applied
摘要：With shifting of the present world towards automation, computer intensive applications are gaining popularity in day-to-day life, resulting into demands for highly scalable and reliable Network-on-Chip (NoC) based architectures along with low power consumption. NoCs are an exertion to impoverish the approach of huge networking architectures and implement them with embedded System-on-Chip (SoC) sphere. In reliable NoC based architectures, efficiency of the system primarily depends upon the interconnected structure or topology. The topologies are critically analyzed on the basis of various performance factors like throughput, latency, scalability, cost of traversal etc. The availability of fixed sized buffer queues at intermediate routers in the interconnection network topology holds a tight constraint over managing the incoming data packets from neighboring routers. With the traffic being heterogeneous and application-centric, the overlay architecture must be chosen wisely to deal with possible congestion scenarios. This paper analyzes the relative conduct of topologies and their altered versions and evaluates the prime performance parameters, viz. throughput and latency under various buffers� queue management schemes. Simulations (NS2) on two different nodes configuration, 16 cores and 64 cores shows Torus and Mesh of Tree as the favorable topologies respectively under diversified traffic.
关键词：Network-on-Chip; System-on-Chip; Topology; Interconnection Network; off-chip; on-chip