文章基本信息

标题：A Sub Threshold Source Coupled Logic Based Design of Low Power CMOS Analog Multiplexer
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作者：G.Deepika ; P.Rama Krishna ; Dr.K.S.Rao 等
期刊名称：International Journal of VLSI Design & Communication Systems
印刷版ISSN：0976-1527
电子版ISSN：0976-1357
出版年度：2014
卷号：5
期号：5
页码：45
DOI：10.5121/vlsic.2014.5504
出版社：Academy & Industry Research Collaboration Center (AIRCC)
摘要：A novel approach for designing Ultra Low Power and wide dynamic range circuit for multiplexing analogsignals is presented. The design operates in weak inversion (Sub threshold) region and uses Source -Coupled Logic ( SCL) circuit. The bias current of the SCL gates is varied to scale down linearly the powerconsumption and the operating frequency. The multiplexer design employs CMOS transistors astransmission gate with dynamic threshold voltage. The design exhibits low power dissipation, highdynamic range and good linearity. The design was implemented in 180 nm technology and was operated ata supply voltage of 400 mV with a bias current ranging in the order of few Pico-amperes. The ON andOFF resistance of the transmission gate achieved were 27 ohms and 10 M ohms respectively. The powerdissipation achieved is around 0.79 μW for a dynamic range of 1μV to 0.4 V.
关键词：Low Power; Source Coupled Logic; Sub threshold; Multiplexer; Analog Signals.