期刊名称:International Journal of VLSI Design & Communication Systems
印刷版ISSN:0976-1527
电子版ISSN:0976-1357
出版年度:2014
卷号:5
期号:5
页码:9
DOI:10.5121/vlsic.2014.5502
出版社:Academy & Industry Research Collaboration Center (AIRCC)
摘要:Reversible logic has attracted substantial interest due to its low power consumption which is the mainconcern of low power VLSI systems. In this paper, a novel 4x4 reversible gate called inventive gate hasbeen introduced and using this gate 1-bit, 2-bit, 8-bit, 32-bit and n-bit group-based reversible comparatorhave been constructed with low value of reversible parameters. The MOS transistor realizations of 1-bit, 2-bit, and 8-bit of reversible comparator are also presented and finding power, delay and power delayproduct (PDP) with appropriate aspect ratio W/L. Novel inventive gate has the ability to use as an n-to-2ndecoder. Different novel reversible circuit design style is compared with the existing ones. The relativeresults shows that the novel reversible gate wide utility, group-based reversible comparator outperformsthe present style in terms of number of gates, garbage outputs and constant input.
关键词:Reversible Logic; Inventive Gate; Garbage Output; Constant input; Full subtractor; n-bit reversible;comparator; Reversible decoder etc.