期刊名称:International Journal of VLSI Design & Communication Systems
印刷版ISSN:0976-1527
电子版ISSN:0976-1357
出版年度:2015
卷号:6
期号:5
页码:69
出版社:Academy & Industry Research Collaboration Center (AIRCC)
摘要:Energy conservative devices are the need of the modern technology which leads to the development ofreversible logic. The synthesis of reversible logic has become an intensely studied area as it overcomes theproblem of power dissipation associated with irreversibility. Storage device such as Read-Only-Memory(ROM) can be realized in a reversible way with low power dissipation. The reversibility of ROM has notbeen yet realized in literature and hence, this paper presents a novel reversible ROM with itsComplementary Metal Oxide Semiconductor (CMOS) realization. On the way to present the architecture ofreversible ROM, we propose a new reversible gate named as Nowrin Papiya (NP) gate. All the proposedcircuits and gates are realized with CMOS based pass transistor logic. Finally, an algorithm as well asseveral theorems on the numbers of gates, transistors and garbage outputs have been presented to showthe optimality of the reversible ROM. Simulations using Microwind DSCH software has been shown toverify the correctness of the proposed design. The comparative results prove that the proposed designs areefficient and optimized in terms of numbers of gates, transistors, garbage outputs, quantum cost and delay.