文章基本信息

标题：Design and Performance Analysis of Various Adders and Multipliers Using GDI Technique
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作者：Simran kaur ; Balwinder Singh ; D. K Jain 等
期刊名称：International Journal of VLSI Design & Communication Systems
印刷版ISSN：0976-1527
电子版ISSN：0976-1357
出版年度：2015
卷号：6
期号：5
页码：45
出版社：Academy & Industry Research Collaboration Center (AIRCC)
摘要：With the active development of portable electronic devices, the need for low power dissipation, high speedand compact implementation, give rise to several research intentions. There are several design techniquesused for the circuit configuration in VLSI systems but there are very few design techniques that gives therequired extensibility. This paper describes the implementation of various adders and multipliers. Thedesign approach proposed in the article is based on the GDI (Gate Diffusion Input) technique. The paperalso includes a comparative analysis of this low power method over CMOS design style with respect topower consumption, area complexity and delay. In this paper, a new GDI based cell designs are projectedand are found to be efficient in terms of power consumption and area in comparison with existing CMOSbased cell functionality. Power and delay has been calculated using Cadence Virtuoso tool at 45nm CMOStechnology. The results obtained show better power and delay performance of the proposed designs at 1.3Vsupply voltage.
关键词：CMOS; GDI; Adders; Low Power; Digital Design