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  • 标题:Review on Configurable and Low-Power Mixed Signal SOC for Portable ECG Monitoring Applications
  • 本地全文:下载
  • 作者:Shubhangi S. Dhumal ; S.K.Bhatia
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2017
  • 卷号:5
  • 期号:5
  • 页码:9993
  • DOI:10.15680/IJIRCCE.2017.0505216
  • 出版社:S&S Publications
  • 摘要:This paper describes a mixed-signal ECG System-on-Chip (SoC) that is capable of implementingconfigurable functionality with low-power utilization for convenient ECG moni-toring applications. ECG worksgenerally by detecting and amplifying the modest potential changes on the hand that are caused when the electricalsignal in the heart muscle is charged and spread during each heartbeat. Achieving reliable and high integrity recordinghowever remains a challenge, especially under daily-life activities. In this paper we introduced a system approach tomotion artifact reduction in ambulatory recordings. A low-voltage and high performance analog front-end extracts 3-channel ECG signals and single channel electrode-tissue-impedance (ETI) measurement with high signal quality. Thiscan be utilized to assess the quality of the ECG measurement and to filter motion artifacts. A custom digital signalprocessor consisting of 4-way SIMD processor gives the configurability and advanced functionality like motion artifactremoval and R peak detection. Analog to Digital Converter (ADC) is capable of adaptive sampling achieving acompression ratio of up to 7, and loop buffer integration decreases the power consumption for on-chip memory access.The SoC is implemented in 0.18 m CMOS process and expends 32 W from a 1.2 V while heart beat detectionapplication is running, and integrated in a wireless ECG monitoring system with Bluetooth protocol. Thanks to theECG SoC, the overall system power consumption can be reduced significantly.
  • 关键词:Bio potential recording; ECG; motion artefact reduction; R peak detection; System-on-Chip (SoC).
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