文章基本信息

标题：FPGA BASED ADAPTIVE RESOURCE EFFICIENT ERROR CONTROL METHODOLOGY FOR NETWORK ON CHIP
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作者：M.DEIVAKANI ; D.SHANTHI
期刊名称：Journal of Theoretical and Applied Information Technology
印刷版ISSN：1992-8645
电子版ISSN：1817-3195
出版年度：2014
卷号：59
期号：3
出版社：Journal of Theoretical and Applied
摘要：This research work proposes resource efficient and secured network on chip router using error control schemes. The proposed method combines the Cipher block encryption based parallel crossbar methodologies of the NoC data link and network layers to efficiently gives error control strength in variable network topology conditions. The proposed method significantly minimizes hardware utilization when compared to other previous works. This can be achieved by implementing parallel cross bar architecture with Cipher block based ECC coding method in NoC. The proposed system uses Modelsim software for simulation purposes and Xilinx Project Navigator for synthesis purposes.
关键词：Error Control; Cipher; Data Link; Residual Packet And Interleaving.