文章基本信息

标题：FPGA Implementation of High Throughput Digital QPSK Modulator using Verilog HDL
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作者：K.Anitha ; Umesharaddy ; B.K.Sujatha 等
期刊名称：International Journal of Advanced Computer Research
印刷版ISSN：2249-7277
电子版ISSN：2277-7970
出版年度：2014
卷号：4
期号：14
页码：217-222
出版社：Association of Computer Communication Education for National Triumph (ACCENT)
摘要：This paper proposes a Quadrature Phase Shift Keying (QPSK) using two different methods. QPSK is one of the forms of Phase Shift Keying (PSK) modulation scheme. Generally a conventional QPSK modulator with Direct Digital Synthesizer (DDS) and arithmetic multiplier separates base band signal into I and Q phase which consumes low throughput with complexity in hardware implementation. Hence to generate high throughput QPSK modulator, the first proposal usesan up and down accumulator for carrier generator instead of DDS and arithmetic multiplier is modified as BOOTH multiplier. The second proposed method will produce the QPSK signal which is based on stored QPSK phase data in ROM which eliminates completely the DDS and multiplier blocks of the modulator.
关键词：QPSK Modulation; Booth Algorithm; Verilog; FPGA.