文章基本信息

标题：Fast Hardware Implementations of Inversions in Small Finite Fields for Special Irreducible Polynomials on FPGAs
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作者：Haibo Yi ; Weijian Li ; Zhe Nie 等
期刊名称：International Journal of Security and Its Applications
印刷版ISSN：1738-9976
出版年度：2016
卷号：10
期号：9
页码：109-120
出版社：SERSC
摘要：nversions in small finite fields are the most computationally intensive field arithmetic and have been playing a key role in areas of cryptography and engineering. The main algorithms for small finite field inversions are based on Fermat's little theorem, extended Euclidean algorithm, Itoh-Tsujii algorithm and other methods. In this brief, we present techniques to exploit special irreducible polynomials for fast inversions in small finite fields(2 )nGF, where n is a positive integer and016n. Then, we propose fast inversions based on Fermat's theorem for two special irreducible polynomials in small finite fields, i.e. trinomials and All-One-Polynomials (AOPs). Trinomials can be represented by polynomials 1nmxx and AOPs can be represented by polynomials1... 1nnxx  , where m is a positive integer and0mn. Our designs have low hardware requirements, regular structures and are therefore suitable for hardware implementation. After that, our designs are programmed in Very-High-Speed Integrated Circuit Hardware Description Language (VHDL) by using integrated environment Altera Quartus II and implemented on a low-cost Field-Programmable Gate Array (FPGA). The experimental results on FPGAs show that our designs provide significant reductions in executing time of inversions in small finite fields, e.g. the executing time of inversion in 7(2 )GF is 18.80 ns and the executing time of inversion in 12(2 )GF is 29.57 ns.
关键词：Inversion; finite field; irreducible polynomial; trinomial; All-One-;Polynomial (AOP); Field-Programmable Gate Array (FPGA); Very-High-Speed ;Integrated Circuit Hardware Description Language (VHDL); executing time; hardware ;implementation