期刊名称:International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN:2347-6710
电子版ISSN:2319-8753
出版年度:2016
卷号:5
期号:3
页码:4508
DOI:10.15680/IJIRSET.2016.0503259
出版社:S&S Publications
摘要:A novel pipelined architecture implementation of adaptive filter based on Distributed arithmetic (DA)for lowpower,highthroughput,and low area. Filtering operations requires larger area and is not suited for higherorder filters therefore causes reduction in the throughput. These problems have been overcome by efficient distributedformulation of Adaptive filters. Distributed arithmetic is an efficient procedure for computing inner products between afixed and a variable data vector. Equivalen implementation of fourpointinner product and weight increments unit toproduce high throughput rate. Conditional signed carrysaveaccumulation is used in order to reduce the samplingperiod and area complexity for DAbasedinnerproductcomputation. Power Is reduced by using fast bit clock forcarrysaveaccumulation but a much slower clock for all other operations. To update the weights by using least meansquare (LMS) adaptation and also minimize the mean square error between the estimated and desired output. It reducethe LUT’s, occupied slices, gate count for design.
关键词:Adaptive filter; circuit optimization; distributed arithmetic (DA); least mean square (LMS) algorithm.