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标题：Design and Analysis of Low Power Digital Signal Processor Architechture for WSN Using Folded Tree
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作者：A.Aayathullah ; P.SaravanaKumar ; A.Sathish Kumar 等
期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2015
期号：MULTICON
页码：411
出版社：S&S Publications
摘要：Radio communication exhibits the highest energy consumption in wireless sensor nodes. Given theirlimited energy supply from batteries or scavenging, these nodes must trade data communication for on-the-nodecomputation. Currently, they are designed around off-the-shelf low-power microcontrollers. But by employing amoreappropriate processing element, the energy consumption can be significantly reduced. My paper describes thedesign and implementation of the newly proposed folded-tree architecture for on-the-node data processing in wirelesssensor networks, using parallel prefix operations and data locality in hardware. Measurements of the siliconimplementation show an improvement of 10–20× in terms of energy as compared to traditional modern microcontrollersfound in sensor nodes. This can be visualized as a binary tree of processing elements (PEs) across whichinput data flows from the leaves to the root. This topology will form the fixed part of our approach, but in order toserve multiple applications, flexibility is also required. The tree-based data flow will, therefore, be executed on a datapath of programmable PEs, which provides this flexibility together with the parallel prefix concept.