期刊名称:International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)
印刷版ISSN:2278-1323
出版年度:2015
卷号:4
期号:4
页码:1084-1089
出版社:Shri Pannalal Research Institute of Technolgy
摘要:An arithmetic and logical unit is the most important unit in any processing system. ALU finds its utility in digital system, microprocessor, microcontroller, DSP, and, communication system. In this paper we have implemented an ALU and have made it fault detection capable using a very simple process known as Ad-hoc testing process. The input for ALUs have been provided using 12 bit Linear Feedback Shift Registers. Altera Quartus II.0 simulator has been used and implementation has been done in Verilog using CPLD EPM7128SLC84-15.