文章基本信息

标题：Implementation on combined CIC filter and 64 taps using compensation Filter in matlab
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作者：Manjunathachari k.b ; Divya Prabha ; M.Z.kurian 等
期刊名称：International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)
印刷版ISSN：2278-1323
出版年度：2014
卷号：3
期号：5
页码：1739-1742
出版社：Shri Pannalal Research Institute of Technolgy
摘要：This paper describes design and FPGA implementation of integrated CIC filter architectures, with applications in 64 taps for compensation filter. And comparing these up sampling and down sampling for simulation result, using some parameters like resource utilization and performance. The CIC filter architectures are modeled using Verilog HDL to verify the correct operation. The programmable logic synthesis and simulation were performed using the tools provided by Xilinx Inc. (ISE 12.2 and Modelsim6.3c) with a Virtex-4 as target device. However, designing CICcompensating filters for sample rate conversion systems.
关键词：CIC FILTER; FPGA; COMPENSATION ; FILTER.