期刊名称:International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)
印刷版ISSN:2278-1323
出版年度:2013
卷号:2
期号:3
页码:1204-1208
出版社:Shri Pannalal Research Institute of Technolgy
摘要:Testing is considered as the major factor for many applications because of the high level fault detection and the fast hardware and software implementations, many of which are power and resource constrained and requires reliable and efficient hardware implementations. In this paper, Output response analyzer(ORA) based fault detection architecture of the Interconnect and Logic block for designing high performance fault detection structure of the FPGA is presented .The proposed output response analyzer based fault detection approach detects faults in both interconnect and logic block . This ORA-based fault detection scheme reaches the maximum fault coverage when compared to other methods of fault detection. The proposed fault detection of the Output response analyzer in this paper have the least area and power consumption compared to their counterparts with similar fault detection capabilities.
关键词:Built in self test(BIST); LFSR; field ; programmable gate array