文章基本信息

标题：A Memory-Efficient Stripe Based Architecture for 2D Discrete Wavelet Transform
本地全文：下载
作者：M.Tharangini ; V.Geetha ; Dr.G.Murugesan 等
期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2014
期号：ICETS
页码：1564
出版社：S&S Publications
摘要：In this paper, a memory efficient new stripebased scanning method for 2- dimensional discretewavelet transform is proposed in order to achieve anefficient memory and to reduce critical path. Theefficient memory is achieved with a stripe basedscanning method that enables tradeoff betweenexternal memory bandwidth and internal buffer size.Based on the data flow graph of the flipped liftingalgorithm, the processing units are developed formaximally utilizing the inherent parallelism. With Snumber of processing units, the throughput can bescaled while keeping the latency constant. Whencompared with the existing architecture, the proposedarchitecture requires less memory. For an N × Nimage, the proposed architecture consumes only 3N +24S words of transposition memory, temporalmemory, and pipeline registers. The synthesizedresults in a Modelsim process show that it achievesbetter area-delay products than the best existingdesign where S is considered to be 2, 4, and 8.
关键词：Discrete wavelet transform (DWT);JPEG2000; lifting-based; VLSI architecture