文章基本信息

标题：High Speed and Pipelined Analog to Digital Converter for Multiple Processor System on Chip
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作者：M.Rajesh ; S.Karthikeyan
期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2015
期号：ICMEET
页码：472
出版社：S&S Publications
摘要：This paper presents the high speed and high resolution analog to digital conversion using successiveapproximation registers (SAR) with split DAC structure based on combining three ADC architectures namely splittype SAR, Sigma-Delta and flash type ADC using pipelining method. The static linearity performance of thisapproach is based on integrating parallelism and pipelining method in SAR with reconfigurable sampling rate tomaintain the tradeoff between speed, accuracy, resolution and architectural complexity. Gaussian smoothing functionis introduced to improve the linearity and to remove glitches. This architecture flexibility provides higher resolutionand high speed Performance is demonstrated and verified by behavioral simulations using Modelsim 6.4a.Measurement results of power, speed, and linearity of this approach are measured through Quartus II 9.0 IDE thatclearly shows the benefits of hybrid SAR ADC in terms of area complexity and speed.
关键词：Gaussian smoothing function; Linearity analysis; Pipelining method; SAR ADCs; Split DAC.