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  • 标题:A fast - Locking Pulsewidth Controlled Clock Generator for High Speed SOC Applications
  • 本地全文:下载
  • 作者:N.Lavanya ; S.Sindhu Meenakshi
  • 期刊名称:International Journal of Innovative Research in Science, Engineering and Technology
  • 印刷版ISSN:2347-6710
  • 电子版ISSN:2319-8753
  • 出版年度:2014
  • 卷号:3
  • 期号:4
  • 页码:11743
  • 出版社:S&S Publications
  • 摘要:A fast-locking pulsewidth-controlledclock generator (PWCCG) based on delay lockedloop is proposed in this paper. The coarse and finedelay lines and a time-to-digital detector permits thepulsewidth-controlled clock generator (PWCCG) tooperate over a wide frequency range. A new dutycyclesetting circuit is also presented in this paperthat decides the preferred output duty cycle. Resultof the proposed circuit achieves suitable for an inputoperating frequency range at 2 MHz, and an inputduty cycle ranging from 30% to 70%, andproduce aprogrammable output duty cycle ranging from 30%to 66%.
  • 关键词:Duty cycle setting circuit; fast-locking;programmable duty cycle; time-to-digital conversion;pulsewidth-controlled clock.
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