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  • 标题:A Novel VLSI based Architecture for Computation of 2D-DCT Image Compression
  • 本地全文:下载
  • 作者:Prashant Chaturvedi ; Prof. Tarun Verma ; Prof. M. Zahid Alam
  • 期刊名称:International Journal of Electrical, Electronics and Computer Engineering
  • 电子版ISSN:2277-2626
  • 出版年度:2012
  • 卷号:1
  • 期号:2
  • 页码:6
  • 语种:English
  • 出版社:RESEARCH TREND
  • 摘要:ABSTRACT: Data image compression is the reduction of redundancy in data representation in order to achieve reduction in storage cost. In This paper The Implementation and Optimization of FPGA based 2DDCT (discrete Cosine Transform) with Quantization and Zigzag with parallel pipelining using VHDL. The two 1D-DCT Separability property and calculation by using a Transpose buffer .The coding is simulated using Xilinx 9.2i ISE Synthesized using Spartan-3E XC3S500. The 2D-DCT Architecture uses 615 slices, 74 I/O pins, and 6 multiplier and operating frequency 124MHz and pipeline latency 160 clock cycles.
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