期刊名称:International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN:2347-6710
电子版ISSN:2319-8753
出版年度:2016
卷号:5
期号:1
页码:171
DOI:10.15680/IJIRSET.2016.0501023
出版社:S&S Publications
摘要:This paper includes implementation and comparison of different parameter of higher radix boothmultiplier. Comparison is made taking both multiplier and multiplicand of 60 bit each and output product of 120 bitusing radix2, radix4, radix8, radix16 and radix32.All these multiplier were designed in verilog programming languageand synthesized on cadence RTL schematic. Comparison is made between delay, area and power utilization of a higherradix multiplier. A Conventional Booth Multiplier consists of the Booth Encoder, the partial-product tree and carrypropagate adder [2, 3]. Different schemes are addressed to improve the area and circuit speed effectively. From theresult it is observed that in most of the parameter performance of radix 4 booth multiplier is more efficient than othermultiplier.
关键词:Radix-2; Radix-4; Radix-8; Radix-16 and Radix-32 Booth Encoding multiplier