期刊名称:International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN:2347-6710
电子版ISSN:2319-8753
出版年度:2015
卷号:4
期号:8
页码:7126
DOI:10.15680/IJIRSET.2015.0408058
出版社:S&S Publications
摘要:The project is concerned with the design, synthesis, and the implementation of pulse width modulation(PWM) on FPGA. The project develops high frequency PWM generator architecture by using FPGA. The resultingFPGA frequency depends on the target FPGA speed grade and the duty cycle resolution requirements.In the PWMarchitecture, we are going to design blocks like N-bitregister, N-bit counter, comparator and R S latch and completePWM architecture is also design and simulated. The VHDL language is used in the design process of PWM.Quartus IIversion 13.0 software is used to perform the simulations. Pulse-width modulation (PWM) is a modulation techniquethat changes the width of the pulse, formally the pulse durationThe simulation was performed on the architecture andafter verifying the results this VHDL code is implemented on Cyclone-IVE FPGA of family EP4CE115F29C7 by usingQuartus-II software.
关键词:Pulse width modulation; Field programmable gate array; Hardware description language; Altera;Quartus II