文章基本信息

标题：Implementation and Comparison of Split Path Data Driven Dynamic Logic Topologies for 8-Bit Booth Multiplier Using 180nm Technology
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作者：M.Ashwini ; M.Kasetty Ram babu
期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2015
卷号：4
期号：7
页码：5458
DOI：10.15680/IJIRSET.2015.0407085
出版社：S&S Publications
摘要：In this paper, an efficient proposed design has been implemented in multiplexer that has designed byusing transmission gates. Transmission gate based design enhances the speed of the desired system. It uses the datatransmission instead of computating the data depending on the input. In this work, three Logical structure of 8×8radix-4 booth multipliers are implemented in 1.8V 0.18um CMOS technology, with as follows SPD3L, ModifiedSPD3L and MUX based. Depending on the input patterns, the modified SPD3L technique saves 10 to 30% power and isslightly faster than SPD3L and MUX based technique saves power 10 to 75% compared to modified SPD3L techniqueand its delay will be same as modified SPD3L. Simulations and designs are performed on Cadence Virtuoso andSpectre tools using UMC 0.18um technology.
关键词：Split path data driven logic (SPD3L); Booth multiplier; Transmission gate; dynamic domino logic