文章基本信息

标题：NEM Relay Based Low Power Design
本地全文：下载
作者：Nitheesh M. Nair
期刊名称：International Journal of Innovative Research in Computer and Communication Engineering
印刷版ISSN：2320-9798
电子版ISSN：2320-9801
出版年度：2015
卷号：3
期号：10
DOI：10.15680/IJIRCCE.2015.0310045
出版社：S&S Publications
摘要：Today's integrated circuit designs are equally limited by the dynamic and leakage power compo nents halting the trend of further supply scaling. A device with a steeper sub -threshold slope is needed in order to continue the scaling trends beyond those of CMOS technology. One such device is a Nano -electromechanical (NEM) relay consisting of an electrostatically actuated beam that can be positioned to either allow conductio n between the source and drain or leave them open-circuited. Because a physical connection determines conduction, relay devices can achieve zero off current and effectively an infinite sub-threshold slope. However, unlike CMOS technology where delay is largely set by the charging and discharging of capacitances, the mechanical motion of the actuated beam largely dominates the delay of relay-based circuits. The zero leakage operation has generated lot of interest in lo w power logic design using these relays. A NEM-relay device is modelled using cadence virtuoso platform and its characteristics where discussed. An inverter is constructed and compared using both NEM relay and CMOS. Also a Weak Conditioned Half Buffer, a circuit commonly used in asynchronous communication, is implemented using NEM- relay as an example for a complex circuit
关键词：NEM Relay; lo w power; Verilog-A