文章基本信息

标题：Implementation of Estimation to Power and Area for VLSI Circuit
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作者：Prajakta Ashok Khedkar ; Ashish Raghuwanshi
期刊名称：International Journal of Innovative Research in Computer and Communication Engineering
印刷版ISSN：2320-9798
电子版ISSN：2320-9801
出版年度：2014
卷号：2
期号：12
出版社：S&S Publications
摘要：In this work, we show a VHDL-based technique to guesstimate precise power dissipation of a meanconsidering the state-craving of the leakage power and conduit dependency of dynamic power. We build up the VHDLmodels of cells which mark out the prospect of the static levels of the signals in the track of a simulation. Then, thesefacts are utilized to compute the power dissipation in the taken as a whole design. The power dissipation of a quantityof standard circuits is estimated via the planned approach. Profound submicron technology on creates a new set ofdesign setbacks. Leading to a power mass and whole power dissipation that is at the bounds of what packaging,chilling, and other communications can support. The leakage current is rising radically, to the position where, in some65nm designs, leakage current is virtually as huge as dynamic current.
关键词：Power Dissipation; ISCAS Circuit; Leakage Power; Simulation Results