文章基本信息

标题：FPGA Implementation of Double Precision Floating Point Arithmetic Unit
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作者：Prabhjot Kaur ; Ankur Sharma ; Raminder Preet Pal Singh 等
期刊名称：International Journal of Engineering and Computer Science
印刷版ISSN：2319-7242
出版年度：2015
卷号：4
期号：9
页码：14523-14528
DOI：10.18535/ijecs/v4i9.76
出版社：IJECS
摘要：Every computer has a floating point processor or a dedicated accelerator that fulfils the requirements of precision using detailedfloating point arithmetic. The main applications of floating points today are in the field of medical imaging, biometrics, motion capture andaudio applications, including broadcast, conferencing, musical instruments and professional audio. Floating point representation cansupport a much wider range of values than fixed point representation. In this design the complex logic operations which consist of variousmultiple numbers of stages are converted into single stage implementation. Once the inputs are applied to the input terminals the finaloutput is obtained at the output terminals there are no intermediate stages. So now the input take less time to reach at output due to singlestage implementation and the number of flip flops and other intermediate required circuits are less as a result the area require is less in thepresented design called high throughput design. All four individual units addition, subtraction, multiplication and division are designedusing Verilog and than combined into one single unit. The code is dumped into low cost Spartan 6 FPGA
关键词：Floating Point; Throughput; IEEE; FPGA; Double Precision; Verilog; Arithmetic Unit