文章基本信息

标题：Optimised ASIC Ready FPGA Design
本地全文：下载
作者：Nemade, P. S. ; Ahmed, M. M.
期刊名称：International Journal of Electronics Communication and Computer Engineering
印刷版ISSN：2249-071X
电子版ISSN：2278-4209
出版年度：2011
卷号：1
期号：1
页码：35-40
出版社：IJECCE
摘要：FPGA devices are an important component in many modern devices. This means that it is important that VLSI designers have a thorough knowledge of how to optimize designs for FPGAs. While the design flows for ASICs and FPGAs are similar, there are many differences as well due to the limitations inherent in FPGA devices. To be able to use an FPGA efficiently it is important to be aware of both the strengths and weaknesses of FPGAs. If an FPGA design should be ported to an ASIC at a later stage it is also important to take this into account early in the design cycle so that the ASIC port will be efficient. This paper investigates as how to optimize a design for an FPGA and what steps should be taken in the design to enable seamless porting from FPGA to ASICS for volume production
关键词：Optimised FPGA vs ASICS; FPGA to ASIC Porting