文章基本信息

标题：Design on CIC interpolator in Model Simulator
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作者：Manjunathachari k.b ; Divya Prabha ; Dr. M Z Kurian 等
期刊名称：International Journal of Innovative Research in Computer and Communication Engineering
印刷版ISSN：2320-9798
电子版ISSN：2320-9801
出版年度：2014
卷号：2
期号：4
出版社：S&S Publications
摘要：This project survey review on optimization of CIC filter, and as arch itecture aspects of up sampling and down sampling rate using CIC filter and comparison between the results in hardware and simulations. Processing a high data rate signal is a difficult task. Reducing the data rate of such signals would ease the processing significantly. In a communications system, two systems might be working at different a rate which requires a rate change process. This is achieved by the use of a decimator or an interpolator. Here CIC filter on designing models are developed for using Xilinx system generator, by cascading various CIC filter stages. The hardware is synthesized in FPGA and verified with Model sim and Mat lab simulation results. This project also discusses about performance analysis with respect to the number of stages (N) and rate change factor (R) of the filter pipelining, throughput and area reduction techniques
关键词：CIC Filter; Multirate; Model sim; FPGA