文章基本信息

标题：A Viterbi Decoder with Efficient Memory Management
本地全文：下载
作者：Lee, Chan-Ho
期刊名称：ETRI Journal
印刷版ISSN：1225-6463
电子版ISSN：2233-7326
出版年度：2004
卷号：26
期号：1
页码：21-21
语种：English
出版社：Electronics and Telecommunications Research Institute
摘要：This paper proposes a new architecture for a Viterbi decoder with an efficient memory management scheme. The trace-back operation is eliminated in the architecture and the memory storing intermediate decision information can be removed. The elimination of the trace-back operation also reduces the number of operation cycles needed to determine decision bits. The memory size of the proposed scheme is reduced to 1/( constraint length) of that of the register exchange scheme, and the throughput is increased up to twice that of the trace-back scheme. A Viterbi decoder complying with the IS-95 reverse link specification is designed to verify the proposed architecture. The decoder has a code rate of 1/3, a constraint length of 9, and a trace-forward depth of 45.
关键词：Viterbi decoder;memory management;VLSI