文章基本信息

标题：A 3.1 to 5 GHz CMOS Transceiver for DS-UWB Systems
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作者：Park, Bong-Hyuk ; Lee, Kyung-Ai ; Hong, Song-Cheol 等
期刊名称：ETRI Journal
印刷版ISSN：1225-6463
电子版ISSN：2233-7326
出版年度：2007
卷号：29
期号：4
页码：421-429
语种：English
出版社：Electronics and Telecommunications Research Institute
摘要：This paper presents a direct-conversion CMOS transceiver for fully digital DS-UWB systems. The transceiver includes all of the radio building blocks, such as a T/R switch, a low noise amplifier, an I/Q demodulator, a low pass filter, a variable gain amplifier as a receiver, the same receiver blocks as a transmitter including a phase-locked loop (PLL), and a voltage controlled oscillator (VCO). A single-ended-to-differential converter is implemented in the down-conversion mixer and a differential-to-single-ended converter is implemented in the driver amplifier stage. The chip is fabricated on a 9.0 die using standard 0.18 CMOS technology and a 64-pin MicroLead Frame package. Experimental results show the total current consumption is 143 mA including the PLL and VCO. The chip has a 3.5 dB receiver gain flatness at the 660 MHz bandwidth. These results indicate that the architecture and circuits are adaptable to the implementation of a wideband, low-power, and high-speed wireless personal area network.
关键词：DS-UWB;transceiver;LNA;mixer;VGA;LPF;PLL;CMOS